Cadence unveils Maestro AI models for chip design — Channel NewsAsia

In San Francisco, United States, Cadence Design Systems unveiled its Cadence Maestro line of artificial intelligence models to assist in designing computer chips. As Channel NewsAsia reports, the development deepens Cadence's partnership with Nvidia and gives customers the option to deploy the models in their own IT infrastructure.

Models for chip design

Cadence and Synopsys develop software for designing microchips. This process involves precisely placing billions of transistors in line with cost and performance requirements. Both companies are developing AI agents capable of working with such tools on behalf of engineers to accelerate design.

According to Cadence, Maestro is partly built on Nvidia's open-weight Nemotron model. Nvidia OpenShell security technology was also used to protect the suite. Customers will be able to run the models in Cadence's cloud, in any public cloud, or entirely in their own data centers behind corporate firewalls.

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Customization for customers

The company said users will be able to further train the models on their own chip designs. According to its early estimates, this could provide up to 30% higher quality and up to five times better cost efficiency compared with general-purpose models.

Cadence's approach differs from the strategy of its largest competitor, Synopsys. On September 30, Synopsys announced a collaboration with OpenAI on the GPT-Synopsys model, which will operate on OpenAI infrastructure. Cadence Senior Vice President Paul Cunningham said Maestro is not tied to a single model provider and that the company considers open and closed models equally. The first Maestro models are expected to become available to select customers through early access in the fourth quarter.